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40-Nanometer



 

UMC is a leading foundry provider of 45/40nm technology, having delivered customer products on this advanced process node since 2008. UMC's 40nm process offering includes both Low Power (LP) and high performance (40G) platforms to meet various design application needs. The 40nm logic process utilizes state-of-the-art immersion lithography, various mobility enhancement techniques, ultra shallow junction and ultra low-k dielectric for maximum power and performance optimization.

 

Key Features of UMC 40-nanometer technology

  • Integrated Flows for Logic, Mixed Mode, and RF
  • 193nm Immersion Litho for Critical Layers
  • Strain Technology to Enhance Mobility
  • Millisecond anneal for ultra shallow junction
  • Retrograde Twin Well (Deep N-Well Option)
  • Multiple Vt Options
  • Enhanced Nitrided Gate Oxide
  • NiSi Process
  • 1P11M Cu/Low K (k = 2.5)
  • 6T/8T e-SRAM Bit Cells
  • e-Fuse Option
  • Wire Bond/ Flip Chip Options
40nm SoC Solutions

UMC's 40-nanometer SoC solution begins with a flexible technology design platform. Customers are able to choose the process device options that are optimized for their specific application, such as high performance and low power transistors. Technology options can then be implemented including mixed signal/RFCMOS and embedded memories to further customize the process.
 
40nm Logic/MM Devices