System
Architecture Knowledge
    IP and Design Methodology
    Process Technologies
    R&D
    65 nm
    90 nm
    0.13 um
    0.15 um
    0.18 um
    0.25 um and above
    Mixed Mode/
RFCMOS
    CMOS Image
Sensor
    High Voltage
    World Class Manufacturing
    Test and Package Solutions
    Design Support Manuals

 

0.18um


UMC's 0.18um technology is developed for a broad range of today's advanced applications. We offer a total solution for today's SoC designers, including IP/Libraries and SRAM compilers. In 2000, UMC led all foundries for 0.18um wafer production and deliveries, with industry leading defect density and cycle times. Copper interconnects are available for the top two metal layers. Our proven track record with advanced technologies such as 0.18um directly translates into better value, higher quality, and faster time to market for our customers.

- Proven ARM cores available, licensed on a special per-use foundry basis
- Library allows up to >100,000 logic gates per mm
- Currently in volume production for multiple market segments


Technology Key Features

  • Shallow trench isolation
  • Retrograde twin well (Triple well option)
  • Dual gate oxides
  • Dual poly gate with CoSi2
  • CoSi2 S/D
  • Up to 1P6M Al with FSG dielectric (top 2 layer Cu option)
  • 4.0 SRAM bit cell
  • Wirebond / Flipchip packaging

0.18um Devices Offering