|
UMC's
0.13 micron process is the industry's most advanced system-on-chip
platform available, employing the most advanced materials
and up to 8 layers of copper interconnects to enable an unmatched
gate density of 220K gates/mm .
UMC's embedded memory technologies include the industry's
most competitive eSRAM bitcell, 1T SRAM, and embedded EEPROM.
Comprehensive IP
/ libraries and design
support complete this total platform offering.
|
| 0.13um
Brochure (pdf, 251kb) |
| |
|
Key
Features of UMC 0.13-micron technology
- Shallow trench isolation
- Retrograde twin well (Triple well option)
- Dual gate oxides
- Dual poly gate with CoSi2
- Up to 1P8M Cu with FSG dielectric
- 2.28 SRAM bit cell
- e-Fuse option
- Wirebond / Flipchip packaging
- BOAC (Bonding Over Active Circuit)
|
| UMC's 0.13um technology features a wide range
of device offerings that are each optimized for different product
applications, from high speed to low leakage. In addition to
these core offerings, RFCMOS/Mixed mode technologies are available
along with Fusion, a design option that allows both high speed
and low leakage transistors to be combined on a single chip. |
| |
0.13um
Devices Offering
 |
|
|
